parent
32332bcd03
commit
380c771988
@ -74,7 +74,8 @@ bool PersistentStore::access_start() {
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// sector is blank so nothing stored yet
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// sector is blank so nothing stored yet
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for (int i = 0; i < EEPROM_SIZE; i++) ram_eeprom[i] = EEPROM_ERASE;
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for (int i = 0; i < EEPROM_SIZE; i++) ram_eeprom[i] = EEPROM_ERASE;
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current_slot = EEPROM_SLOTS;
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current_slot = EEPROM_SLOTS;
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} else {
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}
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else {
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// current slot is the first non blank one
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// current slot is the first non blank one
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current_slot = first_nblank_loc / EEPROM_SIZE;
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current_slot = first_nblank_loc / EEPROM_SIZE;
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uint8_t *eeprom_data = SLOT_ADDRESS(EEPROM_SECTOR, current_slot);
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uint8_t *eeprom_data = SLOT_ADDRESS(EEPROM_SECTOR, current_slot);
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@ -79,14 +79,15 @@ bool PersistentStore::write_data(int &pos, const uint8_t *value, const size_t si
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}
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}
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// Now, write any remaining single byte
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// Now, write any remaining single byte
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if (size & 1) {
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const uint16_t odd = size & 1;
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if (odd) {
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uint16_t temp = value[size - 1];
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uint16_t temp = value[size - 1];
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status = FLASH_ProgramHalfWord(pageBase + pos + i, temp);
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status = FLASH_ProgramHalfWord(pageBase + pos + i, temp);
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if (status != FLASH_COMPLETE) return true;
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if (status != FLASH_COMPLETE) return true;
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}
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}
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crc16(crc, value, size);
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crc16(crc, value, size);
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pos += ((size + 1) & ~1);
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pos += size + odd;
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return false;
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return false;
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}
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}
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@ -97,7 +98,7 @@ bool PersistentStore::read_data(int &pos, uint8_t* value, const size_t size, uin
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if (writing) value[i] = c;
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if (writing) value[i] = c;
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crc16(crc, &c, 1);
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crc16(crc, &c, 1);
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}
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}
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pos += ((size + 1) & ~1);
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pos += ((size + 1) & ~1); // i.e., size+(size&1), round up odd values
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return false;
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return false;
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}
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}
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@ -384,18 +384,35 @@ void MarlinSettings::postprocess() {
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#if ENABLED(EEPROM_SETTINGS)
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#if ENABLED(EEPROM_SETTINGS)
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#define WORD_PADDED_EEPROM ENABLED(__STM32F1__, FLASH_EEPROM_EMULATION)
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#if WORD_PADDED_EEPROM && ENABLED(DEBUG_EEPROM_READWRITE)
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#define UPDATE_TEST_INDEX(VAR) (text_index += sizeof(VAR))
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#else
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#define UPDATE_TEST_INDEX(VAR) NOOP
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#endif
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#if WORD_PADDED_EEPROM
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#define EEPROM_SKIP(VAR) do{ eeprom_index += sizeof(VAR) + (sizeof(VAR) & 1); UPDATE_TEST_INDEX(sizeof(VAR)); }while(0)
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#else
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#define EEPROM_SKIP(VAR) (eeprom_index += sizeof(VAR))
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#endif
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#define EEPROM_START() int eeprom_index = EEPROM_OFFSET; persistentStore.access_start()
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#define EEPROM_START() int eeprom_index = EEPROM_OFFSET; persistentStore.access_start()
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#define EEPROM_FINISH() persistentStore.access_finish()
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#define EEPROM_FINISH() persistentStore.access_finish()
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#define EEPROM_SKIP(VAR) eeprom_index += sizeof(VAR)
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#define EEPROM_WRITE(VAR) do{ persistentStore.write_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc); UPDATE_TEST_INDEX(VAR); }while(0)
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#define EEPROM_WRITE(VAR) persistentStore.write_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc)
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#define EEPROM_READ(VAR) do{ persistentStore.read_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc, !validating); UPDATE_TEST_INDEX(VAR); }while(0)
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#define EEPROM_READ(VAR) persistentStore.read_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc, !validating)
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#define EEPROM_READ_ALWAYS(VAR) do{ persistentStore.read_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc); UPDATE_TEST_INDEX(VAR); }while(0)
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#define EEPROM_READ_ALWAYS(VAR) persistentStore.read_data(eeprom_index, (uint8_t*)&VAR, sizeof(VAR), &working_crc)
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#define EEPROM_ASSERT(TST,ERR) do{ if (!(TST)) { SERIAL_ERROR_MSG(ERR); eeprom_error = true; } }while(0)
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#define EEPROM_ASSERT(TST,ERR) do{ if (!(TST)) { SERIAL_ERROR_MSG(ERR); eeprom_error = true; } }while(0)
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#if ENABLED(DEBUG_EEPROM_READWRITE)
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#if ENABLED(DEBUG_EEPROM_READWRITE)
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#if WORD_PADDED_EEPROM
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int test_index;
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#else
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int &test_index = eeprom_index;
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#endif
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#define _FIELD_TEST(FIELD) \
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#define _FIELD_TEST(FIELD) \
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EEPROM_ASSERT( \
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EEPROM_ASSERT( \
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eeprom_error || eeprom_index == offsetof(SettingsData, FIELD) + EEPROM_OFFSET, \
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eeprom_error || test_index == offsetof(SettingsData, FIELD) + EEPROM_OFFSET, \
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"Field " STRINGIFY(FIELD) " mismatch." \
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"Field " STRINGIFY(FIELD) " mismatch." \
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)
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)
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#else
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#else
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