STM32F1: STM32_HIGH_DENSITY is auto defined in HAL (#14057)
- Fix the `fsmc` and `sdio` units which required hard defines for use.
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@ -21,7 +21,11 @@
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*
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*/
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#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
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#ifdef ARDUINO_ARCH_STM32F1
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#include <libmaple/stm32.h>
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#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
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#include "HAL_sdio_STM32F1.h"
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@ -276,4 +280,5 @@ bool SDIO_GetCmdResp7(void) {
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return true;
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}
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#endif // ARDUINO_ARCH_STM32F1 && (STM32_HIGH_DENSITY || STM32_XL_DENSITY)
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#endif // STM32_HIGH_DENSITY || STM32_XL_DENSITY
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#endif // ARDUINO_ARCH_STM32F1
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@ -26,10 +26,10 @@
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* Communication interface for FSMC
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*/
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#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
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#include "../../inc/MarlinConfig.h"
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#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
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#if HAS_GRAPHICAL_LCD
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#include "U8glib.h"
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@ -226,14 +226,19 @@ void LCD_IO_Init(uint8_t cs, uint8_t rs) {
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gpio_set_mode(GPIOD, 9, GPIO_AF_OUTPUT_PP); // FSMC_D14
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gpio_set_mode(GPIOD, 10, GPIO_AF_OUTPUT_PP); // FSMC_D15
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gpio_set_mode(GPIOD, 4, GPIO_AF_OUTPUT_PP); // FSMC_NOE
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gpio_set_mode(GPIOD, 5, GPIO_AF_OUTPUT_PP); // FSMC_NWE
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gpio_set_mode(GPIOD, 4, GPIO_AF_OUTPUT_PP); // FSMC_NOE
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gpio_set_mode(GPIOD, 5, GPIO_AF_OUTPUT_PP); // FSMC_NWE
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gpio_set_mode(PIN_MAP[cs].gpio_device, PIN_MAP[cs].gpio_bit, GPIO_AF_OUTPUT_PP); //FSMC_CS_NEx
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gpio_set_mode(PIN_MAP[rs].gpio_device, PIN_MAP[rs].gpio_bit, GPIO_AF_OUTPUT_PP); //FSMC_RS_Ax
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FSMC_NOR_PSRAM4_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
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FSMC_NOR_PSRAM4_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
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#ifdef STM32_XL_DENSITY
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FSMC_NOR_PSRAM4_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
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FSMC_NOR_PSRAM4_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
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#else // PSRAM1 for STM32F103V (high density)
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FSMC_NOR_PSRAM1_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
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FSMC_NOR_PSRAM1_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
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#endif
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afio_remap(AFIO_REMAP_FSMC_NADV);
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