Formatting
This commit is contained in:
parent
a06010e08a
commit
7d8c38693f
@ -199,9 +199,9 @@ FORCE_INLINE void HAL_timer_start(const uint8_t timer_num, const uint32_t freque
|
||||
|
||||
/* 18 cycles maximum latency */
|
||||
#define HAL_STEP_TIMER_ISR() \
|
||||
extern "C" void TIMER1_COMPA_vect (void) __attribute__ ((signal, naked, used, externally_visible)); \
|
||||
extern "C" void TIMER1_COMPA_vect_bottom (void) asm ("TIMER1_COMPA_vect_bottom") __attribute__ ((used, externally_visible, noinline)); \
|
||||
void TIMER1_COMPA_vect (void) { \
|
||||
extern "C" void TIMER1_COMPA_vect(void) __attribute__ ((signal, naked, used, externally_visible)); \
|
||||
extern "C" void TIMER1_COMPA_vect_bottom(void) asm ("TIMER1_COMPA_vect_bottom") __attribute__ ((used, externally_visible, noinline)); \
|
||||
void TIMER1_COMPA_vect(void) { \
|
||||
__asm__ __volatile__ ( \
|
||||
A("push r16") /* 2 Save R16 */ \
|
||||
A("in r16, __SREG__") /* 1 Get SREG */ \
|
||||
@ -272,9 +272,9 @@ void TIMER1_COMPA_vect_bottom(void)
|
||||
|
||||
/* 14 cycles maximum latency */
|
||||
#define HAL_TEMP_TIMER_ISR() \
|
||||
extern "C" void TIMER0_COMPB_vect (void) __attribute__ ((signal, naked, used, externally_visible)); \
|
||||
extern "C" void TIMER0_COMPB_vect(void) __attribute__ ((signal, naked, used, externally_visible)); \
|
||||
extern "C" void TIMER0_COMPB_vect_bottom(void) asm ("TIMER0_COMPB_vect_bottom") __attribute__ ((used, externally_visible, noinline)); \
|
||||
void TIMER0_COMPB_vect (void) { \
|
||||
void TIMER0_COMPB_vect(void) { \
|
||||
__asm__ __volatile__ ( \
|
||||
A("push r16") /* 2 Save R16 */ \
|
||||
A("in r16, __SREG__") /* 1 Get SREG */ \
|
||||
|
@ -428,7 +428,7 @@
|
||||
|
||||
static void spiTxBlockX(const uint8_t* buf, uint32_t todo) {
|
||||
do {
|
||||
(void) spiTransferTx(*buf++);
|
||||
(void)spiTransferTx(*buf++);
|
||||
} while (--todo);
|
||||
}
|
||||
|
||||
|
@ -94,11 +94,11 @@ typedef struct {
|
||||
uint16_t payload_size;
|
||||
|
||||
//! Callback called after reception of ZLP from setup request
|
||||
void (*callback) (void);
|
||||
void (*callback)(void);
|
||||
|
||||
//! Callback called when the buffer given (.payload) is full or empty.
|
||||
//! This one return false to abort data transfer, or true with a new buffer in .payload.
|
||||
bool(*over_under_run) (void);
|
||||
bool (*over_under_run)(void);
|
||||
} udd_ctrl_request_t;
|
||||
extern udd_ctrl_request_t udd_g_ctrlreq;
|
||||
|
||||
@ -123,7 +123,7 @@ extern udd_ctrl_request_t udd_g_ctrlreq;
|
||||
* Registered by routine udd_ep_wait_stall_clear()
|
||||
* Callback called when endpoint stall is cleared.
|
||||
*/
|
||||
typedef void (*udd_callback_halt_cleared_t) (void);
|
||||
typedef void (*udd_callback_halt_cleared_t)(void);
|
||||
|
||||
/**
|
||||
* \brief End of transfer callback function type.
|
||||
|
@ -82,7 +82,7 @@ typedef struct {
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool(*enable) (void);
|
||||
bool (*enable)(void);
|
||||
|
||||
/**
|
||||
* \brief Disable the interface.
|
||||
@ -95,7 +95,7 @@ typedef struct {
|
||||
* - the device is detached from the host (i.e. Vbus is no
|
||||
* longer present)
|
||||
*/
|
||||
void (*disable) (void);
|
||||
void (*disable)(void);
|
||||
|
||||
/**
|
||||
* \brief Handle a control request directed at an interface.
|
||||
@ -108,7 +108,7 @@ typedef struct {
|
||||
*
|
||||
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
|
||||
*/
|
||||
bool(*setup) (void);
|
||||
bool (*setup)(void);
|
||||
|
||||
/**
|
||||
* \brief Returns the current setting of the selected interface.
|
||||
@ -117,12 +117,12 @@ typedef struct {
|
||||
*
|
||||
* \return alternate setting of selected interface
|
||||
*/
|
||||
uint8_t(*getsetting) (void);
|
||||
uint8_t (*getsetting)(void);
|
||||
|
||||
/**
|
||||
* \brief To signal that a SOF is occurred
|
||||
*/
|
||||
void(*sof_notify) (void);
|
||||
void (*sof_notify)(void);
|
||||
} udi_api_t;
|
||||
|
||||
//@}
|
||||
|
@ -85,7 +85,7 @@ extern uint16_t HAL_adc_result;
|
||||
// ------------------------
|
||||
|
||||
// clear reset reason
|
||||
void HAL_clear_reset_source (void);
|
||||
void HAL_clear_reset_source(void);
|
||||
|
||||
// reset reason
|
||||
uint8_t HAL_get_reset_source(void);
|
||||
|
@ -150,7 +150,7 @@ extern uint16_t HAL_adc_result;
|
||||
void HAL_init(void);
|
||||
|
||||
// Clear reset reason
|
||||
void HAL_clear_reset_source (void);
|
||||
void HAL_clear_reset_source(void);
|
||||
|
||||
// Reset reason
|
||||
uint8_t HAL_get_reset_source(void);
|
||||
|
@ -107,7 +107,7 @@ bool SDIO_ReadBlock_DMA(uint32_t blockAddress, uint8_t *data) {
|
||||
dma_disable(SDIO_DMA_DEV, SDIO_DMA_CHANNEL);
|
||||
|
||||
if (SDIO->STA & SDIO_STA_RXDAVL) {
|
||||
while (SDIO->STA & SDIO_STA_RXDAVL) (void) SDIO->FIFO;
|
||||
while (SDIO->STA & SDIO_STA_RXDAVL) (void)SDIO->FIFO;
|
||||
SDIO_CLEAR_FLAG(SDIO_ICR_CMD_FLAGS | SDIO_ICR_DATA_FLAGS);
|
||||
return false;
|
||||
}
|
||||
|
@ -153,7 +153,7 @@ extern uint16_t HAL_adc_result;
|
||||
inline void HAL_init(void) { }
|
||||
|
||||
// Clear reset reason
|
||||
void HAL_clear_reset_source (void);
|
||||
void HAL_clear_reset_source(void);
|
||||
|
||||
// Reset reason
|
||||
uint8_t HAL_get_reset_source(void);
|
||||
|
@ -814,8 +814,8 @@ void minkill(const bool steppers_off/*=false*/) {
|
||||
#endif
|
||||
}
|
||||
|
||||
void(*resetFunc)(void) = 0; // Declare resetFunc() at address 0
|
||||
resetFunc(); // Jump to address 0
|
||||
void (*resetFunc)(void) = 0; // Declare resetFunc() at address 0
|
||||
resetFunc(); // Jump to address 0
|
||||
|
||||
#else // !HAS_KILL
|
||||
|
||||
|
@ -29,15 +29,15 @@
|
||||
using namespace FTDI;
|
||||
using namespace FTDI::SPI;
|
||||
|
||||
void CLCD::enable (void) {
|
||||
void CLCD::enable(void) {
|
||||
mem_write_8(REG::PCLK, Pclk);
|
||||
}
|
||||
|
||||
void CLCD::disable (void) {
|
||||
void CLCD::disable(void) {
|
||||
mem_write_8(REG::PCLK, 0x00);
|
||||
}
|
||||
|
||||
void CLCD::set_brightness (uint8_t brightness) {
|
||||
void CLCD::set_brightness(uint8_t brightness) {
|
||||
mem_write_8(REG::PWM_DUTY, min(128,brightness));
|
||||
}
|
||||
|
||||
@ -45,7 +45,7 @@ uint8_t CLCD::get_brightness() {
|
||||
return mem_read_8(REG::PWM_DUTY);
|
||||
}
|
||||
|
||||
void CLCD::turn_on_backlight (void) {
|
||||
void CLCD::turn_on_backlight(void) {
|
||||
mem_write_8(REG::PWM_DUTY, 128);
|
||||
}
|
||||
|
||||
@ -1042,17 +1042,17 @@ template bool CLCD::CommandFifo::write(progmem_str, uint16_t);
|
||||
|
||||
// CO_PROCESSOR COMMANDS
|
||||
|
||||
void CLCD::CommandFifo::str (const char * data) {
|
||||
void CLCD::CommandFifo::str(const char * data) {
|
||||
write(data, strlen(data)+1);
|
||||
}
|
||||
|
||||
void CLCD::CommandFifo::str (progmem_str data) {
|
||||
void CLCD::CommandFifo::str(progmem_str data) {
|
||||
write(data, strlen_P((const char*)data)+1);
|
||||
}
|
||||
|
||||
/******************* LCD INITIALIZATION ************************/
|
||||
|
||||
void CLCD::init (void) {
|
||||
void CLCD::init(void) {
|
||||
spi_init(); // Set Up I/O Lines for SPI and FT800/810 Control
|
||||
ftdi_reset(); // Power down/up the FT8xx with the apropriate delays
|
||||
|
||||
|
@ -124,12 +124,12 @@ class CLCD {
|
||||
class CommandFifo;
|
||||
class FontMetrics;
|
||||
|
||||
static void init (void);
|
||||
static void default_touch_transform (void);
|
||||
static void default_display_orientation (void);
|
||||
static void turn_on_backlight (void);
|
||||
static void enable (void);
|
||||
static void disable (void);
|
||||
static void init(void);
|
||||
static void default_touch_transform(void);
|
||||
static void default_display_orientation(void);
|
||||
static void turn_on_backlight(void);
|
||||
static void enable(void);
|
||||
static void disable(void);
|
||||
static void set_brightness (uint8_t brightness);
|
||||
static uint8_t get_brightness();
|
||||
static void host_cmd (unsigned char host_command, unsigned char byte2);
|
||||
@ -187,7 +187,7 @@ class CLCD::CommandFifo {
|
||||
public:
|
||||
CommandFifo() {start();}
|
||||
|
||||
static void reset (void);
|
||||
static void reset(void);
|
||||
static bool is_processing();
|
||||
static bool has_fault();
|
||||
|
||||
|
@ -31,7 +31,7 @@ namespace FTDI {
|
||||
SPISettings SPI::spi_settings(SPI_FREQUENCY, MSBFIRST, SPI_MODE0);
|
||||
#endif
|
||||
|
||||
void SPI::spi_init (void) {
|
||||
void SPI::spi_init(void) {
|
||||
SET_OUTPUT(CLCD_MOD_RESET); // Module Reset (a.k.a. PD, not SPI)
|
||||
WRITE(CLCD_MOD_RESET, 0); // start with module in power-down
|
||||
|
||||
@ -63,20 +63,11 @@ namespace FTDI {
|
||||
uint8_t k;
|
||||
|
||||
noInterrupts();
|
||||
for(k = 0; k <8; k++) { // Output and Read each bit of spiOutByte and spiInByte
|
||||
if (spiOutByte & spiIndex) { // Output MOSI Bit
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, 1);
|
||||
}
|
||||
else {
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, 0);
|
||||
}
|
||||
for (k = 0; k < 8; k++) { // Output and Read each bit of spiOutByte and spiInByte
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, (spiOutByte & spiIndex) ? 1 : 0); // Output MOSI Bit
|
||||
WRITE(CLCD_SOFT_SPI_SCLK, 1); // Pulse Clock
|
||||
WRITE(CLCD_SOFT_SPI_SCLK, 0);
|
||||
|
||||
if (READ(CLCD_SOFT_SPI_MISO)) {
|
||||
spiInByte |= spiIndex;
|
||||
}
|
||||
|
||||
if (READ(CLCD_SOFT_SPI_MISO)) spiInByte |= spiIndex;
|
||||
spiIndex >>= 1;
|
||||
}
|
||||
interrupts();
|
||||
@ -86,20 +77,13 @@ namespace FTDI {
|
||||
|
||||
#ifdef CLCD_USE_SOFT_SPI
|
||||
void SPI::_soft_spi_send (uint8_t spiOutByte) {
|
||||
uint8_t spiIndex = 0x80;
|
||||
uint8_t k;
|
||||
uint8_t k, spiIndex = 0x80;
|
||||
|
||||
noInterrupts();
|
||||
for(k = 0; k <8; k++) { // Output each bit of spiOutByte
|
||||
if (spiOutByte & spiIndex) { // Output MOSI Bit
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, 1);
|
||||
}
|
||||
else {
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, 0);
|
||||
}
|
||||
for (k = 0; k < 8; k++) { // Output each bit of spiOutByte
|
||||
WRITE(CLCD_SOFT_SPI_MOSI, (spiOutByte & spiIndex) ? 1 : 0); // Output MOSI Bit
|
||||
WRITE(CLCD_SOFT_SPI_SCLK, 1); // Pulse Clock
|
||||
WRITE(CLCD_SOFT_SPI_SCLK, 0);
|
||||
|
||||
spiIndex >>= 1;
|
||||
}
|
||||
interrupts();
|
||||
@ -122,7 +106,7 @@ namespace FTDI {
|
||||
}
|
||||
|
||||
// CLCD SPI - Chip Select
|
||||
void SPI::spi_ftdi_select (void) {
|
||||
void SPI::spi_ftdi_select(void) {
|
||||
#ifndef CLCD_USE_SOFT_SPI
|
||||
::SPI.beginTransaction(spi_settings);
|
||||
#endif
|
||||
@ -131,7 +115,7 @@ namespace FTDI {
|
||||
}
|
||||
|
||||
// CLCD SPI - Chip Deselect
|
||||
void SPI::spi_ftdi_deselect (void) {
|
||||
void SPI::spi_ftdi_deselect(void) {
|
||||
WRITE(CLCD_SPI_CS, 1);
|
||||
#ifndef CLCD_USE_SOFT_SPI
|
||||
::SPI.endTransaction();
|
||||
@ -158,7 +142,7 @@ namespace FTDI {
|
||||
#endif
|
||||
|
||||
// Not really a SPI signal...
|
||||
void SPI::ftdi_reset (void) {
|
||||
void SPI::ftdi_reset(void) {
|
||||
WRITE(CLCD_MOD_RESET, 0);
|
||||
delay(6); /* minimum time for power-down is 5ms */
|
||||
WRITE(CLCD_MOD_RESET, 1);
|
||||
@ -166,8 +150,7 @@ namespace FTDI {
|
||||
}
|
||||
|
||||
// Not really a SPI signal...
|
||||
void SPI::test_pulse(void)
|
||||
{
|
||||
void SPI::test_pulse(void) {
|
||||
#ifdef CLCD_AUX_0
|
||||
WRITE(CLCD_AUX_0, 1);
|
||||
delayMicroseconds(10);
|
||||
|
@ -205,8 +205,7 @@ extern "C" {
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
WEAK void SystemClock_Config(void) {
|
||||
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
|
@ -109,8 +109,7 @@ extern "C" {
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
WEAK void SystemClock_Config(void) {
|
||||
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
|
Loading…
Reference in New Issue
Block a user