Fix and add STM32 SDIO DMA (#21476)
This commit is contained in:
parent
f18da95d38
commit
9902e6fb9f
@ -36,7 +36,8 @@
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// use USB drivers
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// use USB drivers
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extern "C" { int8_t SD_MSC_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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extern "C" {
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int8_t SD_MSC_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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int8_t SD_MSC_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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int8_t SD_MSC_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
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extern SD_HandleTypeDef hsd;
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extern SD_HandleTypeDef hsd;
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}
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}
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@ -75,7 +76,18 @@
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#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported"
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#error "ERROR - Only STM32F103xE, STM32F103xG, STM32F4xx or STM32F7xx CPUs supported"
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#endif
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#endif
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// Fixed
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#define SDIO_D0_PIN PC8
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#define SDIO_D1_PIN PC9
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#define SDIO_D2_PIN PC10
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#define SDIO_D3_PIN PC11
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#define SDIO_CK_PIN PC12
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#define SDIO_CMD_PIN PD2
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SD_HandleTypeDef hsd; // create SDIO structure
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SD_HandleTypeDef hsd; // create SDIO structure
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// F4 support one dma for RX and another for TX.
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// But Marlin will never do read and write at same time, so we use always one dma for both.
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DMA_HandleTypeDef hdma_sdio;
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/*
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/*
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SDIO_INIT_CLK_DIV is 118
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SDIO_INIT_CLK_DIV is 118
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@ -96,7 +108,7 @@
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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// Target Clock, configurable. Default is 18MHz, from STM32F1
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#ifndef SDIO_CLOCK
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#ifndef SDIO_CLOCK
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#define SDIO_CLOCK 18000000 /* 18 MHz */
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#define SDIO_CLOCK 18000000 // 18 MHz
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#endif
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#endif
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// SDIO retries, configurable. Default is 3, from STM32F1
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// SDIO retries, configurable. Default is 3, from STM32F1
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@ -120,24 +132,21 @@
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}
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}
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void go_to_transfer_speed() {
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void go_to_transfer_speed() {
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SD_InitTypeDef Init;
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/* Default SDIO peripheral configuration for SD card initialization */
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/* Default SDIO peripheral configuration for SD card initialization */
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Init.ClockEdge = hsd.Init.ClockEdge;
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hsd.Init.ClockEdge = hsd.Init.ClockEdge;
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Init.ClockBypass = hsd.Init.ClockBypass;
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hsd.Init.ClockBypass = hsd.Init.ClockBypass;
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Init.ClockPowerSave = hsd.Init.ClockPowerSave;
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hsd.Init.ClockPowerSave = hsd.Init.ClockPowerSave;
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Init.BusWide = hsd.Init.BusWide;
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hsd.Init.BusWide = hsd.Init.BusWide;
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Init.HardwareFlowControl = hsd.Init.HardwareFlowControl;
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hsd.Init.HardwareFlowControl = hsd.Init.HardwareFlowControl;
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Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
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/* Initialize SDIO peripheral interface with default configuration */
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/* Initialize SDIO peripheral interface with default configuration */
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SDIO_Init(hsd.Instance, Init);
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SDIO_Init(hsd.Instance, hsd.Init);
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}
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}
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void SD_LowLevel_Init(void) {
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void SD_LowLevel_Init(void) {
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uint32_t tempreg;
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uint32_t tempreg;
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__HAL_RCC_SDIO_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE(); //enable GPIO clocks
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__HAL_RCC_GPIOC_CLK_ENABLE(); //enable GPIO clocks
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__HAL_RCC_GPIOD_CLK_ENABLE(); //enable GPIO clocks
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__HAL_RCC_GPIOD_CLK_ENABLE(); //enable GPIO clocks
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@ -163,11 +172,45 @@
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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#if DISABLED(STM32F1xx)
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// Setup DMA
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// TODO: use __HAL_RCC_SDIO_RELEASE_RESET() and __HAL_RCC_SDIO_CLK_ENABLE();
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#if defined(STM32F1xx)
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RCC->APB2RSTR &= ~RCC_APB2RSTR_SDIORST_Msk; // take SDIO out of reset
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hdma_sdio.Init.Mode = DMA_NORMAL;
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RCC->APB2ENR |= RCC_APB2RSTR_SDIORST_Msk; // enable SDIO clock
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hdma_sdio.Instance = DMA2_Channel4;
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// Enable the DMA2 Clock
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HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
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#elif defined(STM32F4xx)
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hdma_sdio.Init.Mode = DMA_PFCTRL;
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hdma_sdio.Instance = DMA2_Stream3;
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hdma_sdio.Init.Channel = DMA_CHANNEL_4;
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hdma_sdio.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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hdma_sdio.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_sdio.Init.MemBurst = DMA_MBURST_INC4;
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hdma_sdio.Init.PeriphBurst = DMA_PBURST_INC4;
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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#endif
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HAL_NVIC_EnableIRQ(SDIO_IRQn);
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hdma_sdio.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_sdio.Init.MemInc = DMA_MINC_ENABLE;
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hdma_sdio.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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hdma_sdio.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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hdma_sdio.Init.Priority = DMA_PRIORITY_LOW;
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__HAL_LINKDMA(&hsd, hdmarx, hdma_sdio);
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__HAL_LINKDMA(&hsd, hdmatx, hdma_sdio);
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#if defined(STM32F1xx)
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__HAL_RCC_SDIO_CLK_ENABLE();
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__HAL_RCC_DMA2_CLK_ENABLE();
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#else
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__HAL_RCC_SDIO_FORCE_RESET();
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delay(2);
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__HAL_RCC_SDIO_RELEASE_RESET();
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delay(2);
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__HAL_RCC_SDIO_CLK_ENABLE();
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__HAL_RCC_DMA2_FORCE_RESET();
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delay(2);
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__HAL_RCC_DMA2_RELEASE_RESET();
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delay(2);
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__HAL_RCC_DMA2_CLK_ENABLE();
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#endif
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#endif
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//Initialize the SDIO (with initial <400Khz Clock)
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//Initialize the SDIO (with initial <400Khz Clock)
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@ -179,6 +222,7 @@
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// Power up the SDIO
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// Power up the SDIO
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SDIO_PowerState_ON(SDIO);
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SDIO_PowerState_ON(SDIO);
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hsd.Instance = SDIO;
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}
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}
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
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void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
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@ -222,107 +266,82 @@
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if (!status) break;
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if (!status) break;
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if (!--retry_Cnt) return false; // return failing status if retries are exhausted
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if (!--retry_Cnt) return false; // return failing status if retries are exhausted
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}
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}
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go_to_transfer_speed();
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}
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}
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#endif
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#endif
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return true;
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return true;
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}
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}
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/*
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void init_SDIO_pins(void) {
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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// SDIO GPIO Configuration
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static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) {
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// PC8 ------> SDIO_D0
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if(HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) return false;
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// PC12 ------> SDIO_CK
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// PD2 ------> SDIO_CMD
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GPIO_InitStruct.Pin = GPIO_PIN_8;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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}
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*/
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//bool SDIO_init() { return (bool) (SD_SDIO_Init() ? 1 : 0);}
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//bool SDIO_Init_C() { return (bool) (SD_SDIO_Init() ? 1 : 0);}
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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hsd.Instance = SDIO;
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uint8_t retryCnt = SDIO_READ_RETRIES;
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bool status;
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for (;;) {
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TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
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TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
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status = (bool) HAL_SD_ReadBlocks(&hsd, (uint8_t*)dst, block, 1, 1000); // read one 512 byte block with 500mS timeout
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status |= (bool) HAL_SD_GetCardState(&hsd); // make sure all is OK
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HAL_StatusTypeDef ret;
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if (!status) break; // return passing status
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if (src) {
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if (!--retryCnt) break; // return failing status if retries are exhausted
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hdma_sdio.Init.Direction = DMA_MEMORY_TO_PERIPH;
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HAL_DMA_Init(&hdma_sdio);
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ret = HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t *)src, block, 1);
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}
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else {
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hdma_sdio.Init.Direction = DMA_PERIPH_TO_MEMORY;
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HAL_DMA_Init(&hdma_sdio);
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ret = HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t *)dst, block, 1);
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}
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}
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return status;
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/*
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if (ret != HAL_OK) {
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return (bool) ((status_read | status_card) ? 1 : 0);
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HAL_DMA_Abort_IT(&hdma_sdio);
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HAL_DMA_DeInit(&hdma_sdio);
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if (SDIO_GetCardState() != SDIO_CARD_TRANSFER) return false;
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if (blockAddress >= SdCard.LogBlockNbr) return false;
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if ((0x03 & (uint32_t)data)) return false; // misaligned data
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if (SdCard.CardType != CARD_SDHC_SDXC) { blockAddress *= 512U; }
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if (!SDIO_CmdReadSingleBlock(blockAddress)) {
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SDIO_CLEAR_FLAG(SDIO_ICR_CMD_FLAGS);
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dma_disable(SDIO_DMA_DEV, SDIO_DMA_CHANNEL);
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return false;
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return false;
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}
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}
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while (!SDIO_GET_FLAG(SDIO_STA_DATAEND | SDIO_STA_TRX_ERROR_FLAGS)) {}
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uint32_t timeout = millis() + 500;
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// Wait the transfer
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dma_disable(SDIO_DMA_DEV, SDIO_DMA_CHANNEL);
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while (hsd.State != HAL_SD_STATE_READY) {
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if (millis() > timeout) {
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if (SDIO->STA & SDIO_STA_RXDAVL) {
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HAL_DMA_Abort_IT(&hdma_sdio);
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while (SDIO->STA & SDIO_STA_RXDAVL) (void)SDIO->FIFO;
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HAL_DMA_DeInit(&hdma_sdio);
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SDIO_CLEAR_FLAG(SDIO_ICR_CMD_FLAGS | SDIO_ICR_DATA_FLAGS);
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return false;
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return false;
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}
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}
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if (SDIO_GET_FLAG(SDIO_STA_TRX_ERROR_FLAGS)) {
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SDIO_CLEAR_FLAG(SDIO_ICR_CMD_FLAGS | SDIO_ICR_DATA_FLAGS);
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return false;
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}
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}
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SDIO_CLEAR_FLAG(SDIO_ICR_CMD_FLAGS | SDIO_ICR_DATA_FLAGS);
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*/
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while (__HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_sdio)) != 0
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|| __HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TE_FLAG_INDEX(&hdma_sdio)) != 0) { /* nada */ }
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HAL_DMA_Abort_IT(&hdma_sdio);
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HAL_DMA_DeInit(&hdma_sdio);
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timeout = millis() + 500;
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while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
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if (millis() > timeout) return false;
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return true;
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return true;
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}
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}
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bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
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uint8_t retries = SDIO_READ_RETRIES;
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while (retries--) if (SDIO_ReadWriteBlock_DMA(block, NULL, dst)) return true;
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return false;
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}
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
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hsd.Instance = SDIO;
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uint8_t retries = SDIO_READ_RETRIES;
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uint8_t retryCnt = SDIO_READ_RETRIES;
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while (retries--) if (SDIO_ReadWriteBlock_DMA(block, src, NULL)) return true;
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bool status;
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return false;
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for (;;) {
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status = (bool) HAL_SD_WriteBlocks(&hsd, (uint8_t*)src, block, 1, 500); // write one 512 byte block with 500mS timeout
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status |= (bool) HAL_SD_GetCardState(&hsd); // make sure all is OK
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if (!status) break; // return passing status
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if (!--retryCnt) break; // return failing status if retries are exhausted
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}
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return status;
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}
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}
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#if defined(STM32F1xx)
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#define DMA_IRQ_HANDLER DMA2_Channel4_5_IRQHandler
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#elif defined(STM32F4xx)
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#define DMA_IRQ_HANDLER DMA2_Stream3_IRQHandler
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#else
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#error "Unknown STM32 architecture."
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#endif
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extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
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extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); }
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#endif // !USBD_USE_CDC_COMPOSITE
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#endif // !USBD_USE_CDC_COMPOSITE
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#endif // SDIO_SUPPORT
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#endif // SDIO_SUPPORT
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#endif // ARDUINO_ARCH_STM32 && !STM32GENERIC
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#endif // ARDUINO_ARCH_STM32 && !STM32GENERIC
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#include "../libs/hex_print.h"
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#include "../libs/hex_print.h"
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#include "../HAL/shared/eeprom_if.h"
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#include "../HAL/shared/eeprom_if.h"
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#include "../HAL/shared/Delay.h"
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#include "../HAL/shared/Delay.h"
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#include "../sd/cardreader.h"
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extern void dump_delay_accuracy_check();
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extern void dump_delay_accuracy_check();
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#endif
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#endif
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case 4: { // D4 Read / Write PIN
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case 4: { // D4 Read / Write PIN
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// const uint8_t pin = parser.byteval('P');
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//const bool is_out = parser.boolval('F');
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// const bool is_out = parser.boolval('F'),
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//const uint8_t pin = parser.byteval('P'),
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// val = parser.byteval('V', LOW);
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// val = parser.byteval('V', LOW);
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if (parser.seenval('X')) {
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if (parser.seenval('X')) {
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// TODO: Write the hex bytes after the X
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// TODO: Write the hex bytes after the X
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//}
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//}
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}
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}
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else {
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else {
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// while (len--) {
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//while (len--) {
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// TODO: Read bytes from EEPROM
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//// TODO: Read bytes from EEPROM
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// print_hex_byte(eeprom_read_byte(*(adr++));
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// print_hex_byte(eeprom_read_byte(adr++));
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// }
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//}
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SERIAL_EOL();
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SERIAL_EOL();
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}
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}
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} break;
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} break;
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//while (len--) {}
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//while (len--) {}
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}
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}
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else {
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else {
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// while (len--) {
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//while (len--) {
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// TODO: Read bytes from EEPROM
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//// TODO: Read bytes from EEPROM
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// print_hex_byte(eeprom_read_byte(adr++));
|
// print_hex_byte(eeprom_read_byte(adr++));
|
||||||
// }
|
//}
|
||||||
SERIAL_EOL();
|
SERIAL_EOL();
|
||||||
}
|
}
|
||||||
} break;
|
} break;
|
||||||
@ -186,7 +187,60 @@
|
|||||||
SERIAL_ECHOLNPGM("FAILURE: Watchdog did not trigger board reset.");
|
SERIAL_ECHOLNPGM("FAILURE: Watchdog did not trigger board reset.");
|
||||||
} break;
|
} break;
|
||||||
|
|
||||||
|
#if ENABLED(SDSUPPORT)
|
||||||
|
|
||||||
|
case 101: { // D101 Test SD Write
|
||||||
|
card.openFileWrite("test.gco");
|
||||||
|
if (!card.isFileOpen()) {
|
||||||
|
SERIAL_ECHOLNPAIR("Failed to open test.gco to write.");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
__attribute__((aligned(sizeof(size_t)))) uint8_t buf[512];
|
||||||
|
|
||||||
|
uint16_t c;
|
||||||
|
for (c = 0; c < COUNT(buf); c++)
|
||||||
|
buf[c] = 'A' + (c % ('Z' - 'A'));
|
||||||
|
|
||||||
|
c = 1024 * 4;
|
||||||
|
while (c--) {
|
||||||
|
TERN_(USE_WATCHDOG, watchdog_refresh());
|
||||||
|
card.write(buf, COUNT(buf));
|
||||||
|
}
|
||||||
|
SERIAL_ECHOLNPGM(" done");
|
||||||
|
card.closefile();
|
||||||
|
} break;
|
||||||
|
|
||||||
|
case 102: { // D102 Test SD Read
|
||||||
|
card.openFileRead("test.gco");
|
||||||
|
if (!card.isFileOpen()) {
|
||||||
|
SERIAL_ECHOLNPAIR("Failed to open test.gco to read.");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
__attribute__((aligned(sizeof(size_t)))) uint8_t buf[512];
|
||||||
|
uint16_t c = 1024 * 4;
|
||||||
|
while (c--) {
|
||||||
|
TERN_(USE_WATCHDOG, watchdog_refresh());
|
||||||
|
card.read(buf, COUNT(buf));
|
||||||
|
bool error = false;
|
||||||
|
for (uint16_t i = 0; i < COUNT(buf); i++) {
|
||||||
|
if (buf[i] != ('A' + (i % ('Z' - 'A')))) {
|
||||||
|
error = true;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (error) {
|
||||||
|
SERIAL_ECHOLNPGM(" Read error!");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
SERIAL_ECHOLNPGM(" done");
|
||||||
|
card.closefile();
|
||||||
|
} break;
|
||||||
|
|
||||||
|
#endif // SDSUPPORT
|
||||||
|
|
||||||
#if ENABLED(POSTMORTEM_DEBUGGING)
|
#if ENABLED(POSTMORTEM_DEBUGGING)
|
||||||
|
|
||||||
case 451: { // Trigger all kind of faults to test exception catcher
|
case 451: { // Trigger all kind of faults to test exception catcher
|
||||||
SERIAL_ECHOLNPGM("Disabling heaters");
|
SERIAL_ECHOLNPGM("Disabling heaters");
|
||||||
thermalManager.disable_all_heaters();
|
thermalManager.disable_all_heaters();
|
||||||
@ -202,6 +256,7 @@
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user