Clean up HAL_spi_Due.cpp (#13087)
This commit is contained in:
parent
524c6c10bf
commit
e1587da228
@ -250,7 +250,7 @@
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}
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}
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// all the others
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// all the others
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static uint32_t spiDelayCyclesX4 = (F_CPU/1000000); // 4uS => 125khz
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static uint32_t spiDelayCyclesX4 = (F_CPU) / 1000000; // 4uS => 125khz
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static uint8_t spiTransferX(uint8_t b) { // using Mode 0
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static uint8_t spiTransferX(uint8_t b) { // using Mode 0
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int bits = 8;
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int bits = 8;
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@ -451,77 +451,48 @@
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static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
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static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
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static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
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static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
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#if MB(ALLIGATOR) // control SDSS pin
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#if MB(ALLIGATOR)
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void spiBegin() {
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#define _SS_WRITE(S) WRITE(SS_PIN, S)
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SET_OUTPUT(SS_PIN);
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#else
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WRITE(SS_PIN, HIGH);
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#define _SS_WRITE(S) NOOP
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SET_OUTPUT(SCK_PIN);
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#endif
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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_SS_WRITE(HIGH);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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uint8_t spiRec() {
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_SS_WRITE(LOW);
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WRITE(MOSI_PIN, HIGH); // Output 1s 1
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uint8_t b = spiTransferRx(0xFF);
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_SS_WRITE(HIGH);
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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if (nbyte) {
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_SS_WRITE(LOW);
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WRITE(MOSI_PIN, HIGH); // Output 1s 1
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spiRxBlock(buf, nbyte);
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_SS_WRITE(HIGH);
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}
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}
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}
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uint8_t spiRec() {
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void spiSend(uint8_t b) {
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WRITE(SS_PIN, LOW);
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_SS_WRITE(LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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(void)spiTransferTx(b);
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uint8_t b = spiTransferRx(0xFF);
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_SS_WRITE(HIGH);
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WRITE(SS_PIN, HIGH);
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}
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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WRITE(SS_PIN, HIGH);
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}
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void spiSend(uint8_t b) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(b);
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WRITE(SS_PIN, HIGH);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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WRITE(SS_PIN, HIGH);
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#else // let calling routine control SDSS
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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uint8_t spiRec() {
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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}
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void spiSend(uint8_t b) {
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(void) spiTransferTx(b);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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#endif
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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_SS_WRITE(LOW);
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(void)spiTransferTx(token);
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spiTxBlock(buf, 512);
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_SS_WRITE(HIGH);
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}
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}
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/**
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/**
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@ -549,7 +520,7 @@
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spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
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spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
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break;
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break;
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default:
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default:
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spiDelayCyclesX4 = (F_CPU/1000000) >> (6 - spiRate);
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spiDelayCyclesX4 = ((F_CPU) / 1000000) >> (6 - spiRate);
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spiTransferTx = (pfnSpiTransfer)spiTransferX;
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spiTransferTx = (pfnSpiTransfer)spiTransferX;
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spiTransferRx = (pfnSpiTransfer)spiTransferX;
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spiTransferRx = (pfnSpiTransfer)spiTransferX;
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spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
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spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
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@ -557,9 +528,7 @@
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break;
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break;
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}
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}
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#if MB(ALLIGATOR)
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_SS_WRITE(HIGH);
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WRITE(SS_PIN, HIGH);
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#endif
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WRITE(MOSI_PIN, HIGH);
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WRITE(MOSI_PIN, HIGH);
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WRITE(SCK_PIN, LOW);
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WRITE(SCK_PIN, LOW);
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}
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}
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@ -573,6 +542,10 @@
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#else // !SOFTWARE_SPI
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#else // !SOFTWARE_SPI
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#define WHILE_TX(N) while ((SPI0->SPI_SR & SPI_SR_TDRE) == (N))
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#define WHILE_RX(N) while ((SPI0->SPI_SR & SPI_SR_RDRF) == (N))
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#define FLUSH_TX() do{ WHILE_RX(1) SPI0->SPI_RDR; }while(0)
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#if MB(ALLIGATOR)
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#if MB(ALLIGATOR)
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// slave selects controlled by SPI controller
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// slave selects controlled by SPI controller
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@ -645,13 +618,14 @@
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WRITE(SPI_FLASH_CS, HIGH);
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WRITE(SPI_FLASH_CS, HIGH);
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WRITE(SS_PIN, HIGH);
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WRITE(SS_PIN, HIGH);
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OUT_WRITE(SDSS,0);
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OUT_WRITE(SDSS, LOW);
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PIO_Configure(
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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g_APinDescription[SPI_PIN].ulPinConfiguration
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);
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spiInit(1);
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spiInit(1);
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}
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}
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@ -660,30 +634,23 @@
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uint8_t spiRec() {
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uint8_t spiRec() {
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// write dummy byte with address and end transmission flag
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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WHILE_TX(0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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WHILE_RX(0);
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// get byte from receive register
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//DELAY_US(1U);
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//DELAY_US(1U);
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return SPI0->SPI_RDR;
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return SPI0->SPI_RDR;
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}
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}
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uint8_t spiRec(uint32_t chan) {
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uint8_t spiRec(uint32_t chan) {
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uint8_t spirec_tmp;
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// wait for transmit register empty
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WHILE_TX(0);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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FLUSH_RX();
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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spirec_tmp = SPI0->SPI_RDR;
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UNUSED(spirec_tmp);
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// write dummy byte with address and end transmission flag
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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WHILE_RX(0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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return SPI0->SPI_RDR;
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return SPI0->SPI_RDR;
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}
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}
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@ -692,9 +659,9 @@
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if (nbyte-- == 0) return;
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if (nbyte-- == 0) return;
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for (int i = 0; i < nbyte; i++) {
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for (int i = 0; i < nbyte; i++) {
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//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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//WHILE_TX(0);
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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WHILE_RX(0);
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buf[i] = SPI0->SPI_RDR;
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buf[i] = SPI0->SPI_RDR;
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//DELAY_US(1U);
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//DELAY_US(1U);
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}
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}
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@ -705,11 +672,8 @@
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void spiSend(byte b) {
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void spiSend(byte b) {
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// write byte with address and end transmission flag
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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WHILE_TX(0);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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WHILE_RX(0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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SPI0->SPI_RDR;
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SPI0->SPI_RDR;
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//DELAY_US(1U);
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//DELAY_US(1U);
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}
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}
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@ -718,8 +682,8 @@
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if (n == 0) return;
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if (n == 0) return;
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for (size_t i = 0; i < n - 1; i++) {
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for (size_t i = 0; i < n - 1; i++) {
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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WHILE_TX(0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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WHILE_RX(0);
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SPI0->SPI_RDR;
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SPI0->SPI_RDR;
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//DELAY_US(1U);
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//DELAY_US(1U);
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}
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}
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@ -727,29 +691,20 @@
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}
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}
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void spiSend(uint32_t chan, byte b) {
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void spiSend(uint32_t chan, byte b) {
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uint8_t dummy_read = 0;
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WHILE_TX(0);
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// write byte with address and end transmission flag
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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WHILE_RX(0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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FLUSH_RX();
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// clear status
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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dummy_read = SPI0->SPI_RDR;
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UNUSED(dummy_read);
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}
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}
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void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
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void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
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uint8_t dummy_read = 0;
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if (n == 0) return;
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if (n == 0) return;
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for (int i = 0; i < (int)n - 1; i++) {
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for (int i = 0; i < (int)n - 1; i++) {
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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WHILE_TX(0);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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WHILE_RX(0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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FLUSH_RX();
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dummy_read = SPI0->SPI_RDR;
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UNUSED(dummy_read);
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}
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}
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spiSend(chan, buf[n - 1]);
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spiSend(chan, buf[n - 1]);
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}
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}
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// Write from buffer to SPI
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// Write from buffer to SPI
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
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SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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WHILE_TX(0);
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//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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//WHILE_RX(0);
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//SPI0->SPI_RDR;
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//SPI0->SPI_RDR;
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for (int i = 0; i < 511; i++) {
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for (int i = 0; i < 511; i++) {
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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WHILE_TX(0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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WHILE_RX(0);
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SPI0->SPI_RDR;
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SPI0->SPI_RDR;
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//DELAY_US(1U);
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//DELAY_US(1U);
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}
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}
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@ -792,7 +747,7 @@
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// Disable PIO on A26 and A27
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// Disable PIO on A26 and A27
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REG_PIOA_PDR = 0x0C000000;
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REG_PIOA_PDR = 0x0C000000;
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OUT_WRITE(SDSS, 1);
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OUT_WRITE(SDSS, HIGH);
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// Reset SPI0 (from sam lib)
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// Reset SPI0 (from sam lib)
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SPI0->SPI_CR = SPI_CR_SPIDIS;
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SPI0->SPI_CR = SPI_CR_SPIDIS;
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@ -807,45 +762,30 @@
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SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
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SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
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}
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}
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void spiBegin() {
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void spiBegin() { spiInit(); }
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spiInit();
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}
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static uint8_t spiTransfer(uint8_t data) {
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static uint8_t spiTransfer(uint8_t data) {
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WHILE_TX(0);
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// Wait until tx register is empty
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while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 );
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// Send data
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SPI0->SPI_TDR = (uint32_t)data | 0x00070000UL; // Add TMC2130 PCS bits to every byte
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SPI0->SPI_TDR = (uint32_t)data | 0x00070000UL; // Add TMC2130 PCS bits to every byte
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WHILE_TX(0);
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// wait for transmit register empty
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WHILE_RX(0);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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|
||||||
// get byte from receive register
|
|
||||||
return SPI0->SPI_RDR;
|
return SPI0->SPI_RDR;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t spiRec() {
|
uint8_t spiRec() { return (uint8_t)spiTransfer(0xFF); }
|
||||||
uint8_t data = spiTransfer(0xFF);
|
|
||||||
return data;
|
|
||||||
}
|
|
||||||
|
|
||||||
void spiRead(uint8_t* buf, uint16_t nbyte) {
|
void spiRead(uint8_t* buf, uint16_t nbyte) {
|
||||||
if (nbyte == 0) return;
|
if (nbyte)
|
||||||
for (int i = 0; i < nbyte; i++)
|
for (int i = 0; i < nbyte; i++)
|
||||||
buf[i] = spiTransfer(0xFF);
|
buf[i] = spiTransfer(0xFF);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spiSend(uint8_t data) {
|
void spiSend(uint8_t data) { spiTransfer(data); }
|
||||||
spiTransfer(data);
|
|
||||||
}
|
|
||||||
|
|
||||||
void spiSend(const uint8_t* buf, size_t n) {
|
void spiSend(const uint8_t* buf, size_t nbyte) {
|
||||||
if (n == 0) return;
|
if (nbyte)
|
||||||
for (uint16_t i = 0; i < n; i++)
|
for (uint16_t i = 0; i < nbyte; i++)
|
||||||
spiTransfer(buf[i]);
|
spiTransfer(buf[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||||
|
Loading…
Reference in New Issue
Block a user