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FYSETC_242 OLED 12864 for S6 (#20767)

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George Fu 2021-01-17 14:46:57 +08:00 committed by GitHub
parent 6be8ffb771
commit fec58157ac
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 192 additions and 26 deletions
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13
Marlin/src/lcd/dogm/HAL_LCD_class_defines.h
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@ -107,3 +107,16 @@ public:
: U8GLIB(&u8g_dev_uc1701_mini12864_HAL_2x_hw_spi, cs, a0, reset)
{ }
};
extern u8g_dev_t u8g_dev_ssd1309_sw_spi;
extern u8g_dev_t u8g_dev_ssd1309_hw_spi;
class U8GLIB_SSD1309_128X64_HAL : public U8GLIB {
public:
U8GLIB_SSD1309_128X64_HAL(pin_t sck, pin_t mosi, pin_t cs, pin_t a0, pin_t reset = U8G_PIN_NONE)
: U8GLIB(&u8g_dev_ssd1309_sw_spi, (uint8_t)sck, (uint8_t)mosi, (uint8_t)cs, (uint8_t)a0, (uint8_t)reset)
{ }
U8GLIB_SSD1309_128X64_HAL(pin_t cs, pin_t a0, pin_t reset = U8G_PIN_NONE)
: U8GLIB(&u8g_dev_ssd1309_hw_spi, (uint8_t)cs, (uint8_t)a0, (uint8_t)reset)
{ }
};

2
Marlin/src/lcd/dogm/HAL_LCD_com_defines.h
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@ -52,7 +52,9 @@
#elif defined(ARDUINO_ARCH_STM32)
uint8_t u8g_com_std_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr);
uint8_t u8g_com_stm32duino_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr);
#define U8G_COM_HAL_SW_SPI_FN u8g_com_std_sw_spi_fn
#define U8G_COM_HAL_HW_SPI_FN u8g_com_stm32duino_hw_spi_fn
#elif defined(__AVR__)

16
Marlin/src/lcd/dogm/marlinui_DOGM.h
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@ -110,11 +110,9 @@
#define U8G_CLASS U8GLIB_MINI12864_2X // 8 stripes (HW-SPI)
#endif
#elif EITHER(MKS_12864OLED_SSD1306, FYSETC_242_OLED_12864)
#elif ENABLED(MKS_12864OLED_SSD1306)
// MKS 128x64 (SSD1306) OLED I2C LCD
// - or -
// FYSETC OLED 2.42" 128 × 64 FULL GRAPHICS CONTROLLER
#define FORCE_SOFT_SPI // SW-SPI
@ -124,6 +122,18 @@
#define U8G_CLASS U8GLIB_SSD1306_128X64 // 8 stripes
#endif
#elif ENABLED(FYSETC_242_OLED_12864)
// FYSETC OLED 2.42" 128 × 64 FULL GRAPHICS CONTROLLER
#define FORCE_SOFT_SPI // SW-SPI
#if ENABLED(ALTERNATIVE_LCD)
#define U8G_CLASS U8GLIB_SSD1306_128X64_2X // 4 stripes
#else
#define U8G_CLASS U8GLIB_SSD1309_128X64_HAL
#endif
#elif ENABLED(ZONESTAR_12864OLED_SSD1306)
// Zonestar SSD1306 OLED SPI LCD

128
Marlin/src/lcd/dogm/u8g_dev_ssd1309_12864.cpp Normal file
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@ -0,0 +1,128 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include "../../inc/MarlinConfigPre.h"
#if HAS_MARLINUI_U8GLIB
#include "HAL_LCD_com_defines.h"
#include <U8glib.h>
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
// SSD1309 init sequence
static const uint8_t u8g_dev_ssd1309_128x64_init_seq[] PROGMEM = {
U8G_ESC_CS(0), // Disable chip
U8G_ESC_ADR(0), // Instruction mode
U8G_ESC_RST(1), // Do reset low pulse with (1*16)+2 milliseconds
U8G_ESC_CS(1), // Enable chip
0xFD,0x12, // Command Lock
0xAE, // Set Display Off
0xD5,0xA0, // Set Display Clock Divide Ratio/Oscillator Frequency
0xA8,0x3F, // Set Multiplex Ratio
0x3D,0x00, // Set Display Offset
0x40, // Set Display Start Line
0xA1, // Set Segment Re-Map
0xC8, // Set COM Output Scan Direction
0xDA,0x12, // Set COM Pins Hardware Configuration
0x81,0xDF, // Set Current Control
0xD9,0x82, // Set Pre-Charge Period
0xDB,0x34, // Set VCOMH Deselect Level
0xA4, // Set Entire Display On/Off
0xA6, // Set Normal/Inverse Display
U8G_ESC_VCC(1), // Power up VCC & Stabilized
U8G_ESC_DLY(50),
0xAF, // Set Display On
U8G_ESC_DLY(50),
U8G_ESC_CS(0), // Disable chip
U8G_ESC_END // End of sequence
};
// Select one init sequence here
#define u8g_dev_ssd1309_128x64_init_seq u8g_dev_ssd1309_128x64_init_seq
static const uint8_t u8g_dev_ssd1309_128x64_data_start[] PROGMEM = {
U8G_ESC_ADR(0), // Instruction mode
U8G_ESC_CS(1), // Enable chip
0x010, // Set upper 4 bit of the col adr to 0
0x000, // Set lower 4 bit of the col adr to 4
U8G_ESC_END // End of sequence
};
static const uint8_t u8g_dev_ssd13xx_sleep_on[] PROGMEM = {
U8G_ESC_ADR(0), // Instruction mode
U8G_ESC_CS(1), // Enable chip
0x0AE, // Display off
U8G_ESC_CS(0), // Disable chip
U8G_ESC_END // End of sequence
};
static const uint8_t u8g_dev_ssd13xx_sleep_off[] PROGMEM = {
U8G_ESC_ADR(0), // Instruction mode
U8G_ESC_CS(1), // Enable chip
0x0AF, // Display on
U8G_ESC_DLY(50), // Delay 50 ms
U8G_ESC_CS(0), // Disable chip
U8G_ESC_END // End of sequence
};
uint8_t u8g_dev_ssd1309_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
switch(msg) {
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT: {
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_data_start);
u8g_WriteByte(u8g, dev, 0x0B0 | pb->p.page); // Select current page (SSD1306)
u8g_SetAddress(u8g, dev, 1); // Data mode
if (u8g_pb_WriteBuffer(pb, u8g, dev) == 0) return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); // Instruction mode
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) ); // 11 Jul 2015: fixed contrast calculation
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1309_buf[WIDTH*2] U8G_NOCOMMON ;
u8g_pb_t u8g_dev_ssd1309_pb = { {8, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1309_buf};
u8g_dev_t u8g_dev_ssd1309_sw_spi = { u8g_dev_ssd1309_128x64_fn, &u8g_dev_ssd1309_pb, U8G_COM_HAL_SW_SPI_FN };
#endif // HAS_MARLINUI_U8GLIB

35
Marlin/src/pins/stm32f4/pins_FYSETC_S6.h
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@ -198,7 +198,27 @@
//
// LCD / Controller
//
#if HAS_WIRED_LCD
#if ENABLED(FYSETC_242_OLED_12864)
#define BTN_EN1 PC9
#define BTN_EN2 PD1
#define BTN_ENC PA8
#define BEEPER_PIN PC6
#define LCD_PINS_DC PC12
#define LCD_PINS_RS PC7 // LCD_RST
#define DOGLCD_CS PD2
#define DOGLCD_MOSI PC10
#define DOGLCD_SCK PC11
#define DOGLCD_A0 LCD_PINS_DC
#define FORCE_SOFT_SPI
#define KILL_PIN -1 // NC
#define NEOPIXEL_PIN PD0
#elif HAS_WIRED_LCD
#define BEEPER_PIN PC9
#define BTN_ENC PA8
@ -211,11 +231,6 @@
#define LCD_PINS_ENABLE PD1
#define LCD_PINS_D4 PC12
// CR10_STOCKDISPLAY default timing is too fast
#undef BOARD_ST7920_DELAY_1
#undef BOARD_ST7920_DELAY_2
#undef BOARD_ST7920_DELAY_3
#else
#define LCD_PINS_RS PD2
@ -249,21 +264,21 @@
#elif ENABLED(FYSETC_MINI_12864_2_1)
#define NEOPIXEL_PIN PC12
#endif
#endif // !FYSETC_MINI_12864
#endif
#if IS_ULTIPANEL
#define LCD_PINS_D5 PC12
#define LCD_PINS_D6 PD0
#define LCD_PINS_D7 PD1
#if ENABLED(REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER)
#define BTN_ENC_EN LCD_PINS_D7 // Detect the presence of the encoder
#endif
#endif
#endif
#endif // HAS_WIRED_LCD
// Alter timing for graphical display
#if HAS_MARLINUI_U8GLIB
#ifndef BOARD_ST7920_DELAY_1
@ -277,8 +292,6 @@
#endif
#endif
#endif // HAS_WIRED_LCD
#ifndef RGB_LED_R_PIN
#define RGB_LED_R_PIN PB6
#endif